59 -- FABRICATE GE SI WAFERS

Notice Date

November 16, 2001

Contracting Office

Department of the Navy, Office of Naval Research, Naval Research Laboratory/Supply, 4555 Overlook Ave S.W., Washington, DC, 20375

ZIP Code

20375

Solicitation Number

N00173-02-Q-0007

Response Due

December 10, 2001

Point of Contact

Darlene Copp, Contracting Officer, Phone 202-767-2374, Fax 202-404-8158, Email SolQnA@labmis.nrl.navy.mil

Description

Naval Research Laboratory intends to award to MCNC Inc. on other than full and open competitive basis, a purchase for the fabrication of 2 Silicon Wafers. The devices will be based on design information from NRL and converted into mask data. The fabrication process is to include: starting with 2 Ge and Si wafers 4 inches in diameter, approximately 525 um thick, all lithography is to be done on I-line stepper, Oxidize wafers, deposit and pattern 1um of aluminum for a sacrificial layer under the Cr/Au pads, spin deposit and cure 2.5-3um of polyimide, deposit and pattern 1um of Cr/Au film, deposit and pattern thick photoresist for use as the polyimide etch mask, etch polyimide with RIE, strip photoresist, deposit and pattern solder bumps, etch out sacrificial aluminum layer. All completed wafers and process summary document is to be delivered 4 months after receipt of purchase order. Sole source is based on MCNC Inc. having patents relevant to the processing and fabrication of this item. See note(s) 22.

Web Link

Visit this URL for the latest information about this (http://www.eps.gov/spg/USN/ONR/3400/N00173-02-Q-0007/listing.html)

Record

Loren Data Corp. 20011120/59SOL007.HTM (D-320 SN5131W3)