SILICON-ON-INSULATOR NONDESTRUCTIVE TEST METHOD Sandia National Laboratories has patented a technique for screening silicon-on-insulator (SOI) substrates for integrated circuit (IC) fabrication to identify latent defects. These defects in the buried-oxide layer can lead to increased leakage of current in IC devices after fabrication. Use of this invention for screening wafers prior to IC fabrication is expected to reduce manufacturing costs and increase the yield and reliability of SOI integrated circuits. The method includes annealing the substrate in a defect-activating ambient (e.g. hydrogen, forming gas, or ammonia) for sufficient time to activate any defects within an oxide layer of the substrate; measuring a defect-revealing electrical characteristic of the oxide layer, such as capacitance versus voltage or current versus voltage, to determine the quantity of activated defects; and selecting substrates for which the quantity of activated defects is below a predetermined level. The invention can be used for screening any type of semiconductor substrate or wafer on which an oxide layer has been formed. Sandia is making the silicon-on-insulator nondestructive test technique available to companies interested in partnering with Sandia. This partnering can take the form of cooperative research efforts with Sandia, and licensing of the intellectual property on terms up to, and including exclusive licenses in applicable fields of use. For further information, please respond to Joanne Trujillo not later than October 30, 1998, at: Sandia National Laboratories, MS 1380, P.O. Box 5800, Albuquerque, New Mexico 87185-1380, or fax: 505-843-4163. Please indicate the date and title of this CBD notice and the type of partnering agreements your company would be most interested in pursuing with Sandia. E-MAIL: Joanne Trujillo, jmtruji@sandia.gov. Posted 09/09/98 (W-SN247447).

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