Loren Data Corp.

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COMMERCE BUSINESS DAILY ISSUE OF JANUARY 20,1998 PSA#2014

NASA/Langley Research Center, Mail Stop 144, Industry Assistance Office, Hampton, VA 23681-0001

70 -- FABRICATION OF CHIPS-ON-STRUCTURE SAMPLE SOL 1-074-DMH.1484 DUE 013098 POC Artistine Lethcoe-Reid, Purchasing Agent, Phone (757)-864-2432, Fax (757) 864-9774, Email A.LETHCOE-REID@larc.nasa.gov WEB: Click here for the latest information about this notice, http://procurement.nasa.gov/EPS/LaRC/date.html#1-074-DMH.1484. E-MAIL: Artistine Lethcoe-Reid, A.LETHCOE-REID@larc.nasa.gov. This notice is a combined synopsis/solicitation for commercial items prepared in accordance with the format in FAR Subpart 12.6, as supplemented with additional information included in this notice. This announcement constitutes the only solicitation; quotes are being requested and a written solicitation will not be issued. This procurement is being conducted under the Simplified Acquisition Procedures (SAP). NASA/LaRC plans to issue a Request for Quotation for the following goods/or services. Currently, power devices for space applications generate heat typically in the range from 30 W to 300 W, or at least 100 W/cm2 in power flux. In particular, such a power level in small satellite scale imposes a great challenge to diminish subsequent thermal effects. Presently available heat dissipation mechanisms do not promise much more opportunity for innovation on thermal management. Therefore, it is wise to go back to the fundamental issues, such as selection of new materials, new design and fabrication, and new packaging methods, for better survivability of microelectronics by introducing novel and effective heat dissipation mechanisms. Continuing trends in microelectronics are the miniaturization, circuitry densification, and fault-tolerance. The performance increase of microelectronic circuitry is a major benefit and also a driving force pushing forward further miniaturization, circuitry densification, and fault-tolerance. However, packaging technology under such trends should accommodate, tolerate, or dissipate the heat generated from micro-integrated circuits. Even though lowering the operating voltage alleviates the heat dissipation requirement, circuitry densification increases heat generation. In this regard, the chips-on-structure (COS) concept allows potential benefits by an effective heat dissipation through a selected substrate structure which has high thermal conductivity. Note that the high thermal dissipation rate afforded by a highly conductive material offers the possibility of reduced mass. Hence, the COS is able to reduce the overall volume and weight of device by compact packaging of circuitry layout into a feature size of micro-chips. New materials, such as carbon-carbon composites which have a high thermal conductivities (high k) from 600 W/mK to 2000 W/mK and very low coefficients of thermal expansion (CTE), could be used as substrates of micro-chips in place of the traditional ones. There may be other options as well. It is desirable to develop a layer structure of COS that ensures: (1) an acceptable CTE match between a silicon (Si) or galium asenide (GaAs) based chip circuit with dielectric barrier and the substrate material(s), (2) the adhesion of dielectric barrier materials to the chip and substrate, and (3) overall heat dissipation capability with the ability to manage temperature spikes. The works to be performed during the exploratory phase are to identify new materials suitable for substrate and dielectric barrier and to design and fabricate a power amplifier COS, as an extreme case, based on the new materials identified. The contractor shall provide a list of candidate materials for substrate and dielectric barrier and at least a sample of the power amplifier COS which is able to handle 15-Watts maximum power and is fabricated with the materials selected for substrate and dielctric barrier. The contractor shall provide a final report that contains the characterization of selected materials, thermal analysis of a power amplifier COS, and engineering problems associated with COS fabrication. The works contemplated for the follow-on of exploratory phase shall be: (1) to demonstrate a COS-based functional circuit (that might include CPUs, memories, gate arrays, etc.) and (2) to develop a methodology and a sample of multi-chip based COS module which is complex and generates a large amount of heat that must be dissipated at a much faster rate. Deliverables: 1. A final task report. 2. Representative samples for delivery to LaRC for in-house testing. The provisions and clauses in the RFQ are thosein effect through FAC 97-02. This procurement is a total small business set-aside. See Note 1. The SIC code and the small business size standard for this procurement are 8731 and 500 employees, respectively. The quoter shall state in their quotation their size status for this procurement. All qualified responsible business sources may submit a quotation which shall be considered by the agency. Delivery to NASA Langley Research Center is required within 30 days ARO. Delivery shall be FOB Destination. The DPAS rating for this procurement is DO-C9. Quotations for the items(s) described above may be mailed or faxed to the identified point of contact by the date/time specified and include, solicitation number, FOB destination to this Center, proposed delivery schedule, discount/payment terms, warranty duration (if applicable), taxpayer identification number (TIN), identification of any special commercial terms, and be signed by an authorized company representative. Quoters are encouraged to use the Standard Form 1449, Solicitation/Contract/Order for Commercial Items form found at URL: http://procure.arc.nasa.gov/Acq/Standard_Forms/Index.html to submit a quotation. Quoters shall provide the information required by FAR 52.212-1. If the end product(s) quoted is other than domestic end product(s) as defined in the clause entitled "Buy American Act -- Supplies," the quoter shall so state and shall list the country of origin. The Representations and Certifications required by FAR 52.2l2-3 may be obtained via the internet at URL: http://nais.nasa.gov/msfc/pub/reps_certs/sats/ FAR 52.212-4 is applicable. Addenda to FAR 52.212-4 are as follows: 52.211-16, 52.211-17, 52.215-43, 52,213-3 and 1852.215-84. FAR 52.212-5 is applicable and the following identified clauses are incorporated by reference. 52.222-26, 52.222-35, 52.222.36, 52.222-37, 52.225-3, 52.225-18 AND 52.225-21. Questions regarding this acquisition must be submitted in writing no later than 01/22/98. Quotations are due by 01/30/98 to the address specified above and to the attention of the Bid Depository. Selection and award will be made (on an aggregate basis) to the lowest priced, technically acceptable quoter. Technical acceptability will be determined by information submitted by the quoter providing a description in sufficient detail to show that the product quoted meets the Government's requirement. Quoters must provide copies of the provision at 52.212-3, Offeror Representation and Certifications -- Commercial Items with their quote. See above for where to obtain copies of the form via the Internet. An ombudsman has been appointed -- See Internet Note "B". Prospective quoters shall notify this office of their intent to submit a quotation. It is the quoter's responsibility to monitor this site for the release of amendments (if any). Potential quoters will be responsible for downloading their own copy of this combination synopsis/solicitation and amendments (if any). (0015)

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