Loren Data Corp.

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COMMERCE BUSINESS DAILY ISSUE OF AUGUST 14,1996 PSA#1658

Directorate of R&D Contracting, 2530 C Street, Wright-Patterson AFB OH 45433-7607

A -- DEVELOPMENT, EXPLOITATION, AND TRANSITION OF CAE TOOLS SOL PRDA #96-20AAK (PART DUE 093096 POC Contact Kim Atkinson, Contract Negotiator, (513) 255-5252 or Cynthia B. Hollingsworth, Contracting Officer, (513) 255-2206. A--NOTICE: This announcement is in two parts. Part 1 of 2 parts. INTRODUCTION: Development, Exploitation. and Transition of CAE Tools, PRDA # 96-20AAK. This is a Program Research and Development Announcement (PRDA). Wright Laboratory (WL/AASH) is interested in receiving proposals (Technical and Cost) on the research effort described below. Proposals in response to this PRDA shall be submitted by 30 Sep 96, 1500 hours Eastern Daylight Time, to Wright Laboratory, Directorate of R&D Contracting, Attn.: Kim Atkinson, WL/AAKD, Bldg. 7, Area B, 2530 C Street, Wright-Patterson AFB OH 45433-7607. This PRDA is a restricted solicitation for universities or university consortiums located within a 100 mile radius from Wright-Patterson AFB. Proposals submitted shall be in accordance with this announcement and will be accepted for forty-five (45) days after proposed date. Proposal receipt after the cut off date and time specified herein shall be treated in accordance with restrictions of FAR 52.215-10. A copy of this provision may be obtained from the contracting point of contact. There will be no other solicitation issued in regard to this requirement. Offerors should be alert for any PRDA amendments, including those that may permit subsequent submission of proposal dates. Offerors should request a copy of the WL Guide entitled ''PRDA and BAA Guide for Industry.'' This Guide was specifically designed to assist offerors in understanding the PRDA/BAA proposal process. Copies may be requested from WL/AAKD, Bldg. 7, Area B, 2530 C Street, Wright-Patterson AFB OH 45433-7607, Phone: (513) 255-5311. B--REQUIREMENTS: (1) BACKGROUND: The lack of a VHDL/VHDL-AMS reuse library is a primary contributor to lengthy equipment design cycle times. A VHDL/VHDL-AMS reuse library provides the designer with choices he/she may not be familiar with and provides pre-tested building blocks and cores to build higher complexity circuits. Automatic generators offer the best solution to keeping up with very rapidly advancing integrated circuit manufacturing processes. Depending on the type of generator, circuits can be customized through generic parameters (such as the number of bits per data word) and can either be automatically targeted to a cell library with a logic or data-path synthesis tool or the manufacturing artwork for the circuit may be produced directly with a silicon compiler. There are currently a number of innovative prototype design automation tools in the university community that have demonstrated the feasibility of significant reductions in design time and cost. These are referred to as research-quality tools. Most are prototypes and lack testing on large circuits and the user-friendly interfaces needed for production design. This effort is intended to capitalize on the initial research efforts that have been funded by Wright Laboratory, Ohio Aerospace Institute, National Science Foundation, the Advanced Research Project Agency, Semiconductor Research Center, and the Air Force Office of Scientific Research, and others. (2) TECHNICAL DESCRIPTION: WL is seeking innovative and creative ideas to develop, exploit, and transition: a) Reuse VHDL/VHDL-AMS Library Development: This area encompasses the development of a reuse VHDL and/or VHDL-AMS library of integrated circuit design components of interest to the Air Force. Development of the library requires the creation of simulation models, test benches, and WAVES test vectors of the appropriate model views required for quickly designing, virtual prototyping, and synthesizing avionics equipment. The library shall contain public domain models and shall describe commercial-off-the-shelf components, existing application specific components, interconnect protocols, and component building-block or core circuits of key interest to the Air Force, b) Selected Design Projects: WL/AASH anticipates that research projects, mutually agreed upon by Wright Laboratory and the recipient, which will have high payoff to the Government will be identified from time to time during the life of this agreement. The designs may encompass individual, chips, multi-chip modules, or printed wiring boards. It is anticipated that some projects may need to be assigned to subrecipients located more than 100 miles from WPAFB. c) Generator Development: WL/AASH anticipates development of automatic generators for the functions that are used to create digital signal processing and control circuits. Generators are needed for synthesizable designs of microarchitecture circuit elements and digital signal processing application cores, for silicon compiler-based standard cell and datapath cell layouts, and for synthesis of analog and analog-to-digital converter functions. The generators will also be in the public domain and have associated documentation, behavioral simulation models, and test benches. The generators must automatically interface with the design library to a new integrated circuit (IC) manufacturing process in days instead of months and create arbitrary bit-width, pipelined and non-pipelined, self-testing and non-self-testing microarchitecture functions in minutes instead of days. The generators must be usable by Wright Laboratory's computer aided design tools, and c) Research Tool Transition: Research quality design automation tools from universities shall have their quality enhanced where appropriate via: improved user interfaces and documentation, integration into design environments used by Wright Laboratory and the Air Logistics Centers (ALCs), interfaces to additional design libraries and integrated circuit and multichip module manufacturing processes, interfaces to field programmable gate arrays and field programmable interconnect devices, additional testing to insure industrial strength, and other functions as appropriate. It is anticipated that WL/AASH will base the selection of the tools to transition on: 1) their potential payoff, 2) their present status and quality, and 3) their transitionability to commercial design automation vendors. Automatic generators of microarchitecture circuit elements, digital signal processing application cores, standard cell layouts, and datapath cell layouts will be developed. It is anticipated that research-quality design automation tools, most of which are proof-of-concept prototypes, will be further developed to the point where they are usable in a production design environment and can be transitioned to design automation vendors who market to and support the electronic design community. C--DATA AND OTHER DELIVERABLES: (1) DATA: The contractor shall prepare and deliver the following data: (a) Quarterly Reports which include Technical Status Report and Business Status Report, (b)Annual Program Plan, (c) Special Technical Reports which will include individual Research Design Project Reports at the conclusion of each project, (d) Computer Software developed from this effort, (e) Final Report. (2) REVIEWS: A Kickoff Meeting shall be held at Wright-Patterson AFB within two weeks after award. Quarterly technical reviews shall be conducted with the location alternating between the contractor's facility and Wright-Patterson AFB. Bi-weekly review meetings will be held at Wright-Patterson AFB with the universities performing the various selected design projects. The bi-weekly review meetings will be held at Wright-Patterson AFB, special exceptions will be noted (i.e. demonstrations). Anticipated weekly informal working gathering to exchange design ideas and methodologies will be held at each facility accordingly. The Final Review from the overall effort and from each technical effort shall be held at Wright-Patterson AFB. D--SPECIAL CONSIDERATIONS: (1) INTERNATIONAL TRAFFIC IN ARMS RESTRICTIONS (ITAR): ITAR requirements do not apply to this effort. (2) SECURITY REQUIREMENTS: This effort is unclassified. E--ADDITIONAL INFORMATION: (1) The offeror also shall have experience with reuse library development, generator technology development, and development of production-ready design automation tools. (the Government reserves the right to visit an offeror, if necessary, to assess facility capabilities). (2) ANTICIPATED PERIOD OF PERFORMANCE: It is anticipated that this effort will be 60 months in length. (3) EXPECTED AWARD DATE: 30 Sep. 96. (4) GOVERNMENT ESTIMATE: The government anticipates a single award funding profile of $10,000 in FY96, $170,000 in FY97, $200,000 in FY98, $200,000 in FY99, $200,000 in FY00, and $400,000 in FY01. This funding profile is an estimate only and not a promise for funding as all funding is subject to change due to Government discretion and availability. (5) TYPE OF CONTRACT: Cooperative Agreement. Any grants or cooperative agreements awarded will be cost (no fee). (6) GOVERNMENT FURNISHED PROPERTY (GFP)/BASE SUPPORT: None contemplated. (7) SIZE STATUS: For the purpose of this acquisition, the size standard is 500 employees (SIC 8731). (8) PUBLIC LAW 98-94: Public Law 98-94 is not applicable to this effort. END OF PART 1 (0225)

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