Advanced Research Projects Agency (ARPA), Contracts Management Office (CMO), 3701 North Fairfax Drive, Arlington, VA 22203-1714

A -- RESEARCH TOPICS IN EMBEDDED AND REAL-TIME APPLICATIONS OF HIGH PERFORMANCE SCALABLE COMPUTING SOL BAA95-19 DUE 051295 POC Robert H. Parker, Jose Munoz, ARPA/CSTO, FAX: (703)522-2668. The Advanced Research Projects Agency (ARPA) is soliciting proposals in the area of embedded and real-time applications of high performance scalable computing technology. The goal is to leverage and enhance the commercial scalable High Performance Computing (HPC) technology base to support the expanding computing and I/O requirements of a broad class of military, defense, and defense-related embedded applications. It is recognized that this goal may be achieved most cost-effectively by leveraging commercial development in related real-time areas such as multimedia, industrial and process control, and medical. Proposed research should investigate innovative approaches that lead to or enable revolutionary advances in the state of the art of embedded computing toward sustained performance scalable to teraops and sustained data rates of gigabytes-per-second by the year 2000. A specific milestone of the program is to deliver these performance levels to applications through scalable, vendor-neutral, portable programming and operating environments that enable rapid, efficient application development and runtime support. Wherever possible, projects should be tied to demonstrations providing a technology path for early identified classes of military and defense customers or users. Projects should define how they advance the state of the art toward meeting the Grand Challenges of embedded computing in terms of impact on applications and missions. The Grand Challenges in embedded computing refer to the computational, communication and I/O, and application development obstacles that must be overcome to enable the exploration or exploitation of enhanced sensor technology or advanced algorithms to meet anticipated or required mission-specific requirements. There are three primary focus areas of interest: (1) Embedded Application Demonstrations, (2) Programming and Runtime Environments and Operating Systems, and (3) Enabling Infrastructure. Embedded Application Demonstrations: Develop and demonstrate a process that drives the creation of embeddable clones concurrently with the development and evolution of commercial scalable HPC systems. System prototyping efforts must clearly demonstrate a significant improvement in the state of the art in computing performance for embedded applications in terms such as power efficiency, volumetric density, or programmability. Such demonstrations would concentrate on clearly identifiable applications that are enabled by or characterized by their need for HPC computing, services, and environments. Of particular interest are demonstrations that show how flexible, scalable, embedded HPC systems that are cost effective over their entire lifecycle can be introduced into military applications with legacy hardware and software components. Examples of possible application areas include: wide-area RADAR/SAR processing, SONAR, acoustic, signal or image processing, automatic target recognition, and sensor fusion which could not be accomplished without HPC levels of computing. Of equal interest are demonstrations of heterogeneous distributed computing systems incorporating scalable components interconnected by low-cost, low-latency, high-bandwidth interconnect, and supporting scalable I/O. Efforts will be judged by the likelihood of significant impact on embedded application performance and by the commitment for follow-on productization and insertion into military and defense applications. Programming and Runtime Environments and Operating Systems: Exploitation of the benefits of heterogeneous systems, the increasing demands for efficient utilization of computational resources, and the timely processing of sensor data, coupled with the often unique human interface requirements of embedded systems, have resulted in the design of increasingly complex systems. These systems must be supported by programming environments and system engineering tools that fundamentally improve application development productivity, system synthesis, and ease of programming. Development tools with user-friendly graphical interfaces supporting algorithm development and mapping, partitioning, and performance prediction are of interest. Features of interest in software tools and environments include support for: multiple scalable HPC architectures, heterogeneous systems, demonstrations of significant productivity enhancements on real embedded applications, open and emerging standards, a clear path to commercialization, and efficient utilization of computing and I/O resources by an application. Runtime environments supporting resource management, fault analysis, recovery and dynamic reallocation, performance monitoring, and performance visualization are also sought. Techniques for insulating the operating system and hardware architecture from the application software are required for improved interoperability and improved portability. An interoperability layer might provide services such as security while supporting an open, vendor-neutral interface that facilitates tool development. Also of interest is the development of highly-efficient parallel software libraries applicable over a broad range of scalable heterogeneous computing platforms that support emerging standards for interoperability. Operating system development is needed that leverages and extends commercial, scalable, real-time operating systems to support the specialized needs of embedded systems applications. These embedded real-time operating systems must be able to support predictable low-latency response time to asynchronous input, fault tolerance, security, preemption, and high I/O bandwidth to sensors. Enabling Infrastructure: Topics in this focus area include novel computing and communications hardware building blocks for next generation embedded scalable computing systems. (e.g., components leveraging advanced packaging to show ''smallness'' along various dimensions including size, weight, and power, etc.). Topics also include unique power-efficient, scalable microarchitectures, programmable protocol VLSI devices, ultra-low-latency switching elements for scalable networks, novel memory systems supporting higher bandwidth or lower power, and open generic interfaces to scalable computing systems in support of the insertion of accelerator technology and the development of heterogeneous nodes and systems. Also of interest are miniature, ultra-low-power, high-availability technologies or techniques for physically-constrained, unattended systems. In addition, generic hardware approaches and mechanisms to assist automated preventive maintenance and automated fault localization will also be considered. Benchmarks specifically targeted to embedded applications, covering aspects such as computation, communications, I/O, fault tolerance, interfacing into legacy systems, security, and real-time responsiveness will be considered. Benchmarks must specifically identify goals, metrics, and procedures, and be openly available to the embedded community. PROGRAM SCOPE: The proposed duration for individual efforts should not exceed three years in length. Technologies which have a broad impact on military/defense capability will be given highest priority. The first contract awards will be made during the second half of 1995. Additional awards are expected early in Fiscal Year 1996. Total funding is expected to be approximately $35M over three years. It is anticipated that multiple awards will be made. Collaborative efforts and teaming are encouraged where appropriate. Focused demonstration efforts may be co-funded in coordination with other agencies. Proposers are also encouraged to consider a forthcoming companion ARPA Microelectronics Technology Office (MTO) solicitation titled ''Advanced Vision Systems'' (AVIS) focused specifically on accelerator technology for signal processing. Please refer to the Commerce Business Daily publication for official information. GENERAL INFORMATION: In order to minimize unnecessary effort in proposal preparation and review, proposers are strongly encouraged to submit brief proposal abstracts in advance of full proposals. An original and four (4) copies of the proposal abstract must be submitted to ARPA/CSTO, 3701 North Fairfax Drive, Arlington, VA 22203-1714, (ATTN: BAA 95-19) on or before 4:00 PM, March 24, 1995. Proposal abstracts received after this date may not be reviewed. Upon review, ARPA will provide written feedback on the likelihood of a full proposal being selected. Proposers must submit an original and four (4) copies of full proposals by 4:00 PM, May 12, 1995, in order to be considered. Proposers must obtain a pamphlet, BAA 95-19 Proposer Information, which provides further information on areas of interest, the submission, evaluation, funding processes, proposal and proposal abstract formats. This pamphlet may be obtained by fax, electronic mail, or mail request to the administrative contact address given below, as well as at URL address http://www.csto.arpa.mil/ Solicitations.html. Proposals not meeting the format described in the pamphlet may not be reviewed. This notice, in conjunction with the pamphlet BAA 95-19 Proposer Information, constitutes the total BAA. No additional information is available, nor will a formal RFP or other solicitation regarding this announcement be issued. Requests for same will be disregarded. The Government reserves the right to select for award all, some, or none of the proposals received. All responsible sources capable of satisfying the Government's needs may submit a proposal which shall be considered by ARPA. Historically Black Colleges and Universities (HBCU) and Minority Institutions (MI) are encouraged to submit proposals and join others in submitting proposals. However, no portion of this BAA will be set aside for HBCU and MI participation due to the impracticality of reserving discrete or severable areas of research in embedded and real-time applications. Evaluation of proposals will be accomplished through a scientific review of each proposal using the following criteria, which are listed in descending order of relative importance: (1) overall scientific and technical merit, (2) potential contribution and relevance to ARPA mission, (3) offeror's capabilities and related experience, (4) plans and capability to accomplish technology transition, and (5) cost realism. Note: Cost realism will only be critical in proposals which have significantly under or over estimated the cost to complete their effort. All administrative correspondence and questions on this solicitation, including requests for information on how to submit a proposal abstract or proposal to this BAA, must be directed to one of the administrative addresses below by 4:00 PM, May 5, 1995, e-mail or fax is preferred. ARPA intends to use electronic mail and fax for correspondence regarding BAA 95-19 Proposals and proposal abstracts may not be submitted by fax, any so sent will be disregarded. The administrative addresses for this BAA are: Fax: 703-522-2668 Addressed to: ARPA/CSTO, BAA 95-19 Electronic Mail: baa9519@arpa.mil, Electronic File Retrieval: http://www.arpa.mil/Solicitations.html, Mail: ARPA/CSTO ATTN: BAA 95-19, 3701 N. Fairfax Drive, Arlington, VA 22203-1714. (0052)

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