Loren Data's SAM Daily™

SAMDAILY.US - ISSUE OF DECEMBER 12, 2024 SAM #8416
SOURCES SOUGHT

63 -- Sources Sought for HSQ RTU (data concentrator logic processor)

Notice Date

12/10/2024 7:06:04 PM
 

Notice Type

Sources Sought
 

NAICS

334220 — Radio and Television Broadcasting and Wireless Communications Equipment Manufacturing
 

Contracting Office

NAVFACSYSCOM HAWAII PEARL HARBOR HI 96860-3139 USA
 

ZIP Code

96860-3139
 

Solicitation Number

N62478CON33FY2503
 

Response Due

12/24/2024 4:00:00 PM
 

Archive Date

01/08/2025
 

Point of Contact

Kris Nakashima-Wong, Tiare McClellan
 

E-Mail Address

kris.e.nakashima-wong.civ@us.navy.mil, tiare.n.mcclellan.civ@us.navy.mil
(kris.e.nakashima-wong.civ@us.navy.mil, tiare.n.mcclellan.civ@us.navy.mil)
 

Description

The Government intends to procure, under only one responsible source, where no other suppliers or service will satisfy the agency requirements. The Naval Facilities Engineering Systems Command, Hawaii (NAVFAC Hawaii) is conducting market research to determine if other potential products/services can provide for a data concentrator logic processor that has the equal performance and listing/approval requirements as the HSQ 25 x 86 Logic Processor, manufactured by HSQ Technology, 26227 Research Road, Hayward, CA, 94545. The alternate product/service must meet the following requirements/specifications: Be compatible with the telemetry radios, cybersecurity and standardization requirements for the existing SCADA system. Be able to integrate and communicate with existing SCADA system without additional hardware, drivers, or software added to the existing Human Machine Interface (HMI), PLCs and I/O modules. Hardware: All process related functions, calculations, timers, numeric manipulations and protocol conversion must be accomplished in the logic processor hardware and not in the HMI. General Requirements: Logic processors must be micro-processor based, capable of receiving binary and analog inputs and, through programming, must be able to control binary and analog output functions, perform data handling operations and communicate with external devices. Logic processors must perform aggregation functions, protocol conversions, store-and-forward memory mapping, and report by exception policies. Logic processors must meet the requirements of Class A computing devices, and must be labeled as set forth in 47 CFR 15 and must be able to withstand conducted susceptibility test as outlined in NEMA ICS 1, NEMA ICS 2, NEMA ICS 3, and IEEE C37.90.1. Logic processors must function properly at temperatures between 32 and 122 degrees F at 5 to 95 percent relative humidity non-condensing and must tolerate storage temperatures between minus 40 and plus 140 degrees F at 5 to 95 percent relative humidity non-condensing. Central Processing Unit (CPU) Module: The CPU module must be a self contained, microprocessor based unit that provides time of day, scanning, application program execution, storage of application programs, storage of numerical values related to the application process and logic, I/O bus traffic control, peripheral and external device communications and self diagnostics. The scan time must be 250 milliseconds or better including spare I/O channels. Powered by 24 VDC power supply. >8 MB of program RAM available; >64 MB system memory RAM available. Capable of operating in temperatures of 32 to 140 degrees F and relative humidity of 10 to 95 percent. Must possess the capability to modify PLC logic via ethernet port without taking the processor offline. Must have LED status indicators for ""running"" and ""fault"". Must be capable of managing the total amount of discrete and analog I/O as defined by the design documents. Must assign local time-stamps to changes within the IO in the event that communication is lost. Must possess Modbus Master and Slave capability. Communications: Communications must allow peer-to-peer communication with other Operational Technology equipment and must allow the logic processor to communicate with the central station, or workstation. The communication ports must utilize the manufacturer's standard communication architecture and protocol, ethernet architecture and protocol or a combination of these. Communication must allow programming of the logic processor to be done locally through the use of a laptop computer or from the central station or remote workstation. Must be capable of interfacing with ethernet connection at a minimum of 100 MB/s. This notification is for market research purposes only and should not be construed as a commitment of any kind by the U.S. Government to issue a solicitation, request for proposals, quotes, or invitation of bids or award a contract. Interested parties with a comparable product meeting the requirements described in this announcement are invited to submit complete technical data, information and specifications in order for the Government to conduct an evaluation of your product to ensure compatibility with the existing system. Technical response shall be typed, at least 11 point Times New Roman or larger, single-sided 8.5 by 11 inch pages and submitted in Adobe PDF format. Also, provide company information and point of contract (name, title, email, phone, mailing address). The Government will not reimburse any responder for any costs associated with information submitted in response to this sources sought announcement. Any information provided to the Government in response to this request for information (RFI) will become U.S. Government property and will not be returned. All proprietary or classified information will be treated appropriately. The Government reserves the right to disregard any submittal that is incomplete or vague. Please do not submit your company brochure. Interested parties shall submit information and specifications to Ms. Kris Nakashima-Wong, Contracting Officer via email at kris.e.nakashima-wong.civ@us.navy.mil. and Ms. Tiare McClellan, Contract Specialist at tiare.n.mcclellan.civ@us.navy.mil. Interested parties responding to this announcement by Tuesday, December 24, 2024 at 2:00 p.m. Hawaii Standard Time will be considered.
 

Web Link

SAM.gov Permalink
(https://sam.gov/opp/be3371538844452888c6eab52c2721c1/view)
 

Place of Performance

Address: JBPHH, HI 96860, USA

Zip Code: 96860

Country: USA
 

Record

SN07287815-F 20241212/241210230114 (samdaily.us)
 

Source

SAM.gov Link to This Notice
(may not be valid after Archive Date)

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