SOURCES SOUGHT
66 -- SOURCES SOUGHT - ELECTRONICS TO READ OUT SUPERCONDUCTING SENSORS
- Notice Date
- 7/28/2020 5:12:45 PM
- Notice Type
- Sources Sought
- NAICS
- 334418
— Printed Circuit Assembly (Electronic Assembly) Manufacturing
- Contracting Office
- DEPT OF COMMERCE NIST GAITHERSBURG MD 20899 USA
- ZIP Code
- 20899
- Solicitation Number
- NB687080-20-02392
- Response Due
- 7/31/2020 7:30:00 AM
- Archive Date
- 08/15/2020
- Point of Contact
- MeeLondrell T. Lumpkin, Phone: 3034975270, Fax: 3034975470, Patricia Rose, Phone: 3034973106
- E-Mail Address
-
meelondrell.lumpkin@nist.gov, patricia.rose@nist.gov
(meelondrell.lumpkin@nist.gov, patricia.rose@nist.gov)
- Description
- Sources Sought for Commercial Item Purchase The National Institute of Standards & Technology (NIST) seeks information on vendors that are capable of providing additional sets of the readout electronics to continue writing firmware and software to utilize the system purchased in order to implement scalable microwave multiplexed readout as follows:� The NIST microwave SQUID multiplexing system requires readout electronics capable of handling thousands of channels of cryogenic sensors.� The thousands of channels of cryogenic sensors is made possible by having at least eight channels of 16-bit 1 GSPS digital-to-analog converters (DACs) and at least eight channels of 16-bit 1 GSPS analog-to-digital converters (ADCs) along with an field-programmable gate array (FPGA) capable of performing digital signal processing (DSP) on the full data stream.� The goal of this contract is to provide the Government with the required readout electronics. � The Government requires three (3) individual readout electronic systems.� Each independent readout electronic system shall consist of factory new parts only that meet the following specifications: The FPGA carrier card shall have the following specifications: 1. ��FPGA carrier card (quantity 1).� a. �At least 1 million system logic cells b. �At least 5000 Digital Signal Processing (DSP) slices c. �At least 70 Mb of total block RAM d. �Supports PCIe Gen3 and at least x8 lanes e. �Must have at least 2 FPGA Mezzanine Cards (FMC) high-pin count card sites that are VITA 57.1 standard compliant for the DACs and ADCs f. �Must have at least 8 GB of DDR4 SDRAM g. �Each FPGA carrier card when fitted with 2 FMC cards must meet the 3U strand electronics rack height requirement h. �Must have a Direct Memory Access (DMA) engine compatible with the full data rate of at least two ADC channels i. �Must include a reference design showing data transfer from the ADCs to the FPGA and from FPGA to the DACs at 1 GSPS and 16 bits j. �All firmware provided must be compatible for use with the vendor software for the FPGA (i.e. Vivado for Xilinx FPGAs or Quartus II for Altera FPGAs) k. �All firmware source code is shared with the customer, preferably in VHDL 2. ��16-bit DAC channels with a sampling rate of 1GSPS (Quantity 8) a. �All eight channels must be able to operate simultaneously at 1 GSPS and 16 bits b. �Each channel must have an spurious-free dynamic range (SFDR) greater than 63 dB c. ��The DACs must support external clock reference and triggering d. The board must be fully compliant to ANSI/VITA 57.1-2010 standard e. �Each DAC channel on the board must support coaxial connection using Micro-Miniature Coaxial (MMCX) connectors f. �The board must support monitoring of board power supply, board temperature, and output voltage offset adjustment. 3.� 16-bit ADC channels with a sampling rate of 1GSs� (Quantity 8) a. �All eight channels must be able to operate simultaneously at 1 GSPS and 16 bits b. �Each channel must have an effective number of bits (ENOB) of at least 11.3 bits c. �The ADCs must support external clock reference and triggering d. �The board must be fully compliant to ANSI/VITA 57.1-2010 standard e. �Each ADC channel on the board must support coaxial connection using MMCX connectors. f. �The board must support monitoring of board power supply, temperature, and offset adjustment. This announcement is not a Request for Quote (RFQ) and does not commit the Government to award a contract now or in the future. No solicitation is available at this time. The purpose of this synopsis is to identify organizations with the requisite qualifications to meet the requirements of the item stated herein. After the results of this market research are obtained and analyzed and compared with NIST's minimum (see SOW contained herewithin), NIST may conduct a competitive procurement and subsequently award a contract. If at least two qualified small businesses are identified during this market research stage, then this acquisition may be solicited as a small business set aside. NIST is seeking responses from all responsible sources, including large and small businesses (SB, SDB, WOSB, HUBZone, SDVOSB, and VOSB). This requirement is assigned a NAICS code 334418, Printed Circuit Assembly (Electronic Assembly) Manufacturing. The specific purpose of this Sources Sought Announcement is to determine if there are small businesses, within the parameters identified above, that are capable of providing the services identified. Interested business organizations that believe they are capable of meeting the requirement should submit electronic copies or mailed copies of their capability statements. Please limit responses to FIVE (5) pages or less (8.5"" x11"" format, 1"" margins, 12-point font, double spaced), including figures and tables. Responses should include the following information: 1. Name of the company and address that will provide the product. 2. Company DUNS number, Cage Code, Tax ID Number, and Type of small business, e.g., Services Disabled Veteran Owned Small Business, Veteran-owned small business, 8(a), HUBZone, Women-Owned Small Business, Small disadvantaged business, or Small Business HUBZone business. 3. Company point of contact, phone, fax, and e-mail. 4. Name of the company that will manufacture the product. 5. Specification sheets and examples of products that meet the specifications. 6. Contact information of customers who have obtained and used these products. 7. Typical lead time to deliver the product after receipt of the order. 8. Any other relevant information that is not listed above, which the Government should consider in developing its minimum specifications and finalizing its market research. BASED ON THE RESPONSES TO THIS SOURCES SOUGHT NOTICE/MARKET RESEARCH, THIS REQUIREMENT MAY BE SET-ASIDE FOR SMALL BUSINESSES. Any company proprietary information should be so marked. The written capability statement should be received by the Contracting Officer no later than 8:30 am Mountain Standard Time (MST) July 31, 2020. The capability statement shall identify the business status of the organization. Only electronic or mailed statements will be accepted. �Faxes will not be accepted. Send to MeeLondrell Lumpkin Contracting Officer, at meelondrell.lumpkin@nist.gov. Direct all questions to this e-mail no later than noon MST July 30, 2020.
- Web Link
-
SAM.gov Permalink
(https://beta.sam.gov/opp/aa631d106b1a49128c64f26dde59bc13/view)
- Place of Performance
- Address: Boulder, CO 80305, USA
- Zip Code: 80305
- Country: USA
- Zip Code: 80305
- Record
- SN05736843-F 20200730/200728230145 (samdaily.us)
- Source
-
SAM.gov Link to This Notice
(may not be valid after Archive Date)
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