SOURCES SOUGHT
A -- Advancements in Integrated Circuit Technology Areas
- Notice Date
- 3/5/2018
- Notice Type
- Sources Sought
- NAICS
- 541715
— Research and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)
- Contracting Office
- Department of the Navy, Naval Air Systems Command, Naval Air Warfare Center Weapons Division, 429 E. Bowen Rd. Stop 4015 - CL, 575 'I' Ave, Bldg 36, Ste 1116 - PM, China Lake/Pt Mugu, California, 93555-6108, United States
- ZIP Code
- 93555-6108
- Solicitation Number
- N6893618R0050
- Archive Date
- 4/5/2019
- Point of Contact
- Janet C. Campbell, Phone: 760-939-9507, Sierra L Trepanier, Phone: (760) 939-8958
- E-Mail Address
-
janet.campbell@navy.mil, sierra.trepanier@navy.mil
(janet.campbell@navy.mil, sierra.trepanier@navy.mil)
- Small Business Set-Aside
- N/A
- Description
- The Naval Air Warfare Center Weapons Division (NAWCWD) is requesting information via whitepapers in the technology areas of Monolithic Microwave Integrated Circuit (MMIC), Application-Specific Integrated Circuits (ASIC), integrated circuit signal integrity, packaging, etc. All contractors included on the white paper shall be U.S. owned and operated businesses for acquisition purposes. Likewise, all individual researchers mentioned in any submission shall be U.S. citizens with the ability to obtain security clearances. Submissions should include capabilities pertaining to research topics in advancements in integrated circuit technology areas including but not limited to ASIC and MMIC design, physical layout, modeling (including electromagnetic models), characterization, fabrication processes and materials. Include market trends and beyond state-of-the-art predictions, major players and DoD access challenges. Part of the capabilities should include: 1.Packaging and assembly techniques at the integrated circuit (IC) and system level. 2.Printed circuit board (PCB) design, physical layout, and modeling of prototype design methodology. Specifically address multiple layer PCBs consisting of 20 layers or more, wiring dimensions consisting of less than or equal to 3 mil (76 µm) line width and spacing, and boards consisting of micro-via and via-in-via interconnects. 3.Packaging design technologies including PCB construction materials, performance-enhancing layout techniques and cooling systems. 4.Signal integrity (SI), power integrity (PI), and thermal integrity (TI) analysis techniques at the IC, PCB, and system level. 5.AC and DC power delivery network capabilities including frequency-based impedance at the IC and PCB level. 6.System level architecture and design at various levels of complexity and integration. 7.System level modeling for performance predictions. 8.When applicable, enter into a non-disclosure agreement with other contractors in order to conduct the work outlined above. Whitepapers should be submitted to Janet Campbell (janet.campbell@navy.mil) and Sierra Trepanier (sierra.trepanier@navy.mil) within 30 days of this posting.
- Web Link
-
FBO.gov Permalink
(https://www.fbo.gov/notices/fba7f075ad99964695ffbdf15beae463)
- Record
- SN04842217-W 20180307/180305230838-fba7f075ad99964695ffbdf15beae463 (fbodaily.com)
- Source
-
FedBizOpps Link to This Notice
(may not be valid after Archive Date)
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