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FBO DAILY ISSUE OF DECEMBER 16, 2001 FBO #0014
PRESOLICITATION NOTICE

66 -- Combination Electrostatic Discharge and Latch-up Tester

Notice Date
12/14/2001
 
Notice Type
Presolicitation Notice
 
Contracting Office
Other Defense Agencies, Office of the Secretary of Defense, Defense Microelectronics Activity, Contracting Division 4234 54th Street, Building 620, McCellan, CA, 95652-1521
 
ZIP Code
95652-1521
 
Solicitation Number
DMEA90-02-T-0002
 
Response Due
1/9/2002
 
Archive Date
1/24/2002
 
Point of Contact
Judith Hilton, Contracting Officer, Phone (916) 231-1526, Fax (916) 231-2826, - Kellie Valdez, Chief, Contracting Division, Phone (916) 231-1523, Fax (916) 231-2823,
 
E-Mail Address
hilton@dmea.osd.mil, valdez@dmea.osd.mil
 
Description
This is a combined synopsis/solicitation for a commercial item prepared IAW FAR 12.6. Price quotes are being requested and a written solicitation will not be issued. DMEA90-02-T-0002 is being issued as a request for quote. The following is the performance statement for the ESD/Latch-Up Tester, 1 each. Specifications for the ESD and Latch-Up Integrated Circuit Tester shall meet the following minimum requirements: 1. Tester shall implement voltage and current levels, waveforms, pulse simulator, dynamic testing, DUT disposition and record-keeping, interface and test set-up, heater(s), timing signals and logic setup vectors required to control the I/O pin output states as specified, and all other set-up and test criteria as specified in the following Test Methods: a. ESD Sensitivity Classification for Human Body Model (HBM) IAW Mil-Std-883E, Method 3015 (or JEDEC Standard ? JESD22-A114-B. b. IC Latch-Up Test in accordance with JEDEC Standard ?EIA/JESDA78. 2. Tester (unmodified, as delivered) shall accommodate ICs with a minimum pin count of 192 pins (with support for various package types). Tester shall have the capability for upgrading the pin count to a minimum of 256 pins. 3. The purchase cost for Device Under Test (DUT) hardware required to test ICs of the following types shall be identified: a. Standard Configurations and b. Custom Configurations. 4. Tester shall implement standard architecture, graphical and other user interfaces. 5. Ease of Programming Tester Setup. A. Ease of Operation for ESD and Latch-Up Qualification testing and b. Tester shall provide of system modification/upgrade i. For changing DUTs and ii. For future system upgrades and enhancements. 6. Test Report Generation a. Internal Storage on local workstation. b. Export data standard text formats. The NAICS code is 334515. All responsible sources may submit a proposal which shall be considered. Include a completed copy of the provision at FAR 52.212-3, Offeror Representations and Certifications ? Commercial Items with your offer. Contractors must be registered in the Central Contractor Registration (CCR) prior to an award. The following FAR clauses are applicable to this combined synopsis/solicitation: FAR 52.212-1, Instructions to Offerors ?Commercial Items, FAR 52.212-2, Evaluation ? Commercial Items, and FAR 52.212-4, Contract Terms and Conditions ? Commercial Items. Catalog literature will be required to be submitted on the equipment proposed. Standard commercial warranty is required. Offerors are due at 3:00 PM Pacific time on 09 Jan 2002 to Judy Hilton. Questions regarding this solicitation must be in writing and faxed to Judy Hilton at (916) 231-2826.
 
Place of Performance
Address: 4234 54th Street, McClellan CA
Zip Code: 95652
Country: USA
 
Record
SN20011216/00006766-011215155737 (fbodaily.com)
 

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